--- title: Serial Bus Protocols url: https://doc.liz6.com/en/hardware/06-interfaces-and-communication/02-serial-bus-protocols locale: en area: hardware tags: - hardware - interfaces-and-communication date: 2026-06-30 modified: 2026-07-16 description: 'Serial Bus Protocols Parallel vs. Serial --- UART (Universal Asynchronous Receiver-Transmitter) Basic Concepts UART: Asynchronous Full-Duplex, Baud Rates of Tra…' --- # Serial Bus Protocols ## Parallel vs. Serial ``` Parallel: Multiple lines transmit multiple bits simultaneously (8/16/32 bits at once) Fast but requires many wires; clock skew limits speed Serial: Single line transmits bits sequentially Fewer wires, supports higher frequencies → Modern high-speed interfaces are all serial ``` --- ## UART (Universal Asynchronous Receiver-Transmitter) ### Basic Concepts UART: Asynchronous Full-Duplex, Baud Rates of Transmitter and Receiver Must Match Connection: TX and RX are cross-connected (Full-Duplex simultaneous transmission and reception) MCU_A MCU_B TX → RX RX ← TX Frame Format: Timing Structure of a Data Frame Idle (High) Start=0 D0 D1 D2 D3 D4 D5 D6 D7 Parity? (Optional) Stop=1 Baud Rate (9600 / 115200 / 921600…) must be identical on both sides, with error < ±2%; Asynchronous without an independent clock line; relies on both sides aligning each bit according to the agreed baud rate. ### Parameters | Parameter | Common Values | |------|--------| | Baud Rate | 9600, 19200, 38400, 57600, 115200 | | Data Bits | 8 (most common), 7 | | Stop Bits | 1, 2 | | Parity | None, Even, Odd | | Flow Control | None, RTS/CTS (Hardware) | ### Applications ``` Debug Serial Port (printf output to PC) GPS/Bluetooth Modules (AT Commands) Legacy Peripheral Communication Pros: Simple, cheap, reliable Cons: Point-to-point only, low speed, no standard application layer ``` --- ## I2C (Inter-Integrated Circuit) ### Basic Concepts ``` Synchronous, Half-Duplex, Multi-Master Multi-Slave 2 Wires: SCL (Clock) + SDA (Data) Vcc │ Rp Rp ← Pull-up Resistors (Required!) │ │ ├───┼────────── SDA │ │ ┌┴┐ ┌┴┐ │Mst│ │Slv1│ │Slv2│ ... └─┘ └─┬┘ └─┬┘ │ │ ├────┼──── SCL │ │ GND GND SCL: Clock provided by Master SDA: Bidirectional Data (Open-Drain, Wired-AND) Each Slave has a unique 7-bit (or 10-bit) address ``` ### Communication Process ``` Start Condition: SDA↓ while SCL is High Send: 7-bit Address + R/W bit → Slave responds with ACK Transfer: 8-bit Data + ACK ... (can be continuous) Stop Condition: SDA↑ while SCL is High ACK: SDA=0 on the 9th clock cycle (Receiver Acknowledges) NACK: SDA=1 on the 9th clock cycle (No Acknowledge) Speed Modes: Standard: 100 kHz Fast: 400 kHz (Most Common) Fast+: 1 MHz High Speed: 3.4 MHz ``` ### Applications ``` Sensors (Temperature/Humidity/IMU/Light...) EEPROM/FRAM Memory RTC (Real-Time Clock Chips) PMIC (Power Management ICs) OLED Displays Almost all low-speed peripherals Pros: Only 2 wires, multiple devices share bus Cons: Slow speed, pull-up design issues (power consumption), address conflicts ``` ### Pull-up Resistor Selection ``` R too small → High power consumption (large sink current) R too large → Slow rising edge → Speed limited Rule of Thumb: 100kHz: 4.7kΩ 400kHz: 2.2kΩ 1MHz: 1kΩ or smaller Calculation: Rmax = tr / (0.8473 × Cbus) tr = 300ns (for 100kHz mode) Cbus = Bus Capacitance (Chip + PCB Traces) ``` --- ## SPI (Serial Peripheral Interface) ### Basic Concepts SPI: Synchronous Full-Duplex, Master exclusively controls clock and chip select (at least 4 wires) MCU (Master) Peripheral (Slave) SCK · Clock (Master→Slave) MOSI · Master Out, Slave In MISO · Slave Out, Master In CSn · Chip Select (One per Slave) Connecting Multiple Slaves: Two Methods Independent CSn: One chip select line per slave, sharing SCK/MOSI/MISO Daisy Chain: Slave MISO → Next Slave MOSI in series, sharing one CSn Master exclusively controls clock and chip select; no addressing mechanism, slaves distinguished by CSn. ### Clock Modes (CPOL, CPHA) ``` CPOL=0: SCK Idle Low CPOL=1: SCK Idle High CPHA=0: Sampling on first edge CPHA=1: Sampling on second edge Most Common: Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1) Both sides must match! Otherwise communication will fail. ``` ### Characteristics ``` Pros: ✓ Full-Duplex (Simultaneous TX/RX) ✓ High Speed (Tens of MHz, even 100MHz+) ✓ No Address Mechanism → No Overhead ✓ Flexible (Arbitrary frame length) Cons: ✗ Many Wires (n Slaves = n+3 wires) ✗ No Standard Protocol Layer (Only Physical/Data Link defined) ✗ No Slave Flow Control (ACK) ✗ Short Distance (PCB-level) Applications: Flash (NOR/NAND), ADC/DAC, Displays, Ethernet PHY ``` --- ## Comparison of the Three Buses | Feature | UART | I2C | SPI | |------|------|-----|-----| | Wires | 2 (TX+RX) | 2 (SCL+SDA) | 4 (SCK+MOSI+MISO+CS) | | Communication | Asynchronous | Synchronous | Synchronous | | Duplex | Full-Duplex | Half-Duplex | Full-Duplex | | Speed | < 1Mbps | < 3.4Mbps | Tens of Mbps | | Multi-Slave | No | Yes (Address) | Yes (CSn) | | Distance | Long (RS-232) | PCB/Short | PCB | | Complexity | Simplest | Medium | Relatively Simple | | Flow Control | None/Hardware | ACK/NACK | None | | Typical Use | Debug/Wireless Modules | Sensors | Flash/Display/High-Speed | --- ## Quick Reference: When to Choose What ``` Sensor Reading (Low Speed, Many Devices) → I2C High-Speed Data Transfer (Flash/SD/Display) → SPI Debug Info, Wireless Modules → UART Multi-byte Register Read/Write → I2C (Address+Data) or SPI Battery Powered (Lowest Power) → I2C (Near-zero static power) Anti-Interference (Long Distance Differential) → RS-485 (Physical Layer Variant of UART) ``` --- *Keywords: UART, I2C, SPI, Baud Rate, SCL, SDA, MOSI, MISO, CS, Pull-up Resistor, ACK*