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Logic Levels and Interface Physical Layers

Why Logic Levels Are Needed

When two chips communicate, they must agree on: What voltage counts as "1"? What counts as "0"? What is the drive capability? What is the noise margin? Mismatches lead to communication failures or even chip damage.


Single-Ended Signals

TTL (Transistor-Transistor Logic)

The oldest standard (74 series)

Vcc: 5V ± 10%
VOH > 2.4V, VOL < 0.4V
VIH > 2.0V, VIL < 0.8V

Noise margin is approx. 0.4V (small!)
Output drive: Weak sourcing (~0.4mA), Strong sinking (~16mA)

Being replaced by CMOS, but 3.3V is still common

CMOS (Complementary Metal-Oxide-Semiconductor)

Modern mainstream logic levels

Vcc = 5V:
  VOH > Vcc-0.1V, VOL < 0.1V  (Almost rail-to-rail!)
  VIH > 0.7×Vcc, VIL < 0.3×Vcc

Vcc = 3.3V:
  VIH > 2.0V, VIL < 0.8V

Vcc = 1.8V:
  VIH > 0.65×Vcc, VIL < 0.35×Vcc

Large noise margin → Good interference immunity
Extremely low static power consumption (only consumes power during switching)

Note: 3.3V CMOS output can drive 5V TTL input (VIH=2.0V)
      But 5V output cannot be directly connected to 3.3V CMOS input (may cause damage or latch-up)

Differential Signals

Why Differential

Single-Ended vs Differential: One Less Ground Reference Line for Interference Immunity and High Speed

Single-Ended Requires Ground Reference Signal Line GND Reference (Must be Common Ground)

Differential No Ground Reference Needed Positive Line Negative Line (No GND Reference!)

Differential Advantages ✓ Common-Mode Noise Cancellation Interference is identical on both lines; difference remains unchanged ✓ No Ground Loop Issues ✓ High-Speed Transmission Low Swing ✓ Lower EMI Positive and Negative currents cancel out, resulting in low radiation

Core: Common-mode interference is identical on both differential lines; the receiver subtracts them to cancel interference—no common ground reference needed, thus strong immunity, high speed, and low EMI.

LVDS (Low Voltage Differential Signaling)

Swing: ~350mV (differential)
Common-mode voltage: ~1.2V
Speed: Hundreds of Mbps to several Gbps

Termination: 100Ω differential termination resistor
Power consumption: Extremely low (constant current drive ~3.5mA)

Applications: Displays (FPD-Link), Cameras (MIPI D-PHY), Backplanes

RS-232 — Classic Serial Port

Single-ended, Full-duplex
Logic: 1 = -3~-15V, 0 = +3~+15V
      (Note: Negative voltage is Logic 1!)
Drive capability: Long-line drive (~15m)

High voltage, large noise margin, but slow speed (≤115.2kbps)
Level Shifter: MAX232 (TTL ↔ RS-232)

DB9 Pins:
  Pin2: RXD (Receive)
  Pin3: TXD (Transmit)
  Pin5: GND

RS-485 — Mainstay of Industrial Communication

Differential, Half-duplex or Full-duplex
Swing: > 1.5V (differential)
Common-mode range: -7V ~ +12V (Large! Tolerates ground potential differences)

Distance: Up to 1200m (at low speeds)
Speed: Up to ~50Mbps (short distances)
Multi-point: 32~256 nodes can be connected on one bus

Termination: 120Ω differential termination resistor (one at each end)

Applications: MODBUS, PROFIBUS, DMX512
Chips: MAX485, SN75176

CAN Bus

Differential, Multi-master, Priority Arbitration
Dominant (0): CANH-CANL > 0.9V
Recessive (1): CANH-CANL ≈ 0V

Speed: Up to 1Mbps (CAN FD up to 8Mbps)
Fault Tolerance: Extremely strong (Error detection + Auto-retransmission + Fault isolation)

Termination: 120Ω at each end

Applications: Automotive (OBD-II), Industrial Control, Robotics

Open-Drain / Open-Collector

          Vpullup
             │
             Rpullup
             │
Internal     ├── SDA/Signal Line
┌────┐        │
│    │───┐   │
│ GPIO│  NMOS │
│    │───┘   │
└────┘        │
             GND

NMOS ON  → Pulls Low (Strong drive capability)
NMOS OFF → Pulled High by Pull-up Resistor (Weak drive capability)

Applications:
- I2C (Multi-master shared bus)
- Wire-AND: Multiple open-drain outputs can be directly connected; if any pulls the bus low, it is low
- Level Shifting: Changing Vpullup changes the output high level

Level Shifting

Scenarios

3.3V MCU connecting to 5V Peripheral — Most Common!
1.8V Sensor connecting to 3.3V MCU

Solutions

1. Resistor Voltage Divider (Step-down only): 3.3→1.8, 5→3.3
   ──┤├───┬── Simple but weak pull-up, slow speed
          ├── Signal
   ──┤├───┘

2. Dedicated Level Shifter Chips:
   TXB0104 (Auto-direction, Low Speed)
   TXS0108E (Auto-direction, Open-Drain Compatible)
   SN74LVC1T45 (Direction Control, High Speed)

3. MOSFET Solution (Bi-directional, Low Speed):
         VCC_LOW     VCC_HIGH
            │           │
            Rp          Rp
            │           │
   LOW ─────┤ S    D ├── HIGH
            │  ──┬──  │
            │    │G   │
            │    │    │
           GND  GND  GND

Quick Reference for Common Levels

StandardDiff/SingleSwingMax SpeedDistanceApplication
TTL 5VSingle-Ended0~5V~50MHzPCBTraditional Digital
CMOS 3.3VSingle-Ended0~3.3V~100MHzPCBMainstream Digital
CMOS 1.8VSingle-Ended0~1.8V~200MHzPCBLow Power
LVDSDifferential±350mVGbps~10mDisplay/High Speed
RS-232Single-Ended±12V115kbps15mDebug Serial
RS-485Differential>1.5V50Mbps1200mIndustrial
CANDifferential>0.9V8Mbps~1kmAutomotive
USB 2.0Differential±400mV480Mbps5mPC Peripherals

Keywords: TTL, CMOS, LVDS, Differential Signals, Open-Drain, RS-232, RS-485, CAN, Level Shifting