A 10 μF capacitor placed next to the power supply may still experience voltage droop during a load transient; a capacitor may also behave more like an inductor at higher frequencies. "Blocks DC, passes AC" is merely a shorthand for an ideal model. This article starts with the relationship between charge and voltage change, then incorporates effective capacitance, ESR, ESL, and actual connections into the analysis.
Phenomenon or Task
Key Relationship
Read Location
Why voltage changes slowly
i = C·dv/dt
Charge, Energy, and Continuity
Why high-frequency decoupling still has impedance
Combined effects of C, ESR, and ESL
Self-Resonance and Real Impedance
Why nominal capacitance is insufficient
Bias voltage, temperature, tolerance, and aging
Selecting Based on Effective Capacitance
How capacitors filter or block DC
Branch position and impedance on both sides
Low-pass, Coupling, and Decoupling
Can transient voltage droop be estimated?
Charge deficit, ESR, and inductance
Load Step Example
Charge, Energy, and Continuity
An ideal capacitor is formed by two conductors insulated from each other. Charging accumulates equal and opposite charges on the two terminals, storing energy in the electric field. Port current does not mean free electrons cross the ideal dielectric from one plate to the other; the external circuit moves charge to the terminals, and the changing electric field between the plates corresponds to displacement current.
In a linear model with fixed parameters, q = Cv, where the unit of C is F = C/V, describing how much charge change corresponds to a given voltage change. Adopting the convention that current enters the positive voltage terminal, differentiating with respect to time yields i = C·dv/dt. If C varies with voltage, one must distinguish between q/v and differential capacitance dq/dv; the fixed C formula cannot be applied unconditionally to the entire large-signal process.
When a 10 μF capacitor is subjected to a constant 1 mA charging current, dv/dt = 100 V/s, meaning the voltage rises by 0.1 V per millisecond. If connected to a fixed voltage source through a resistor, the current decreases as the remaining voltage difference shrinks, resulting in an exponential change rather than a linear ramp. See DC Circuit Analysis for specific RC solutions.
The accurate condition for "voltage cannot change instantaneously" is that voltage remains continuous in a finite capacitor without impulsive current. An ideal voltage source forcing an ideal capacitor to undergo a voltage step would require an impulsive current; in reality, source impedance and parasitic parameters limit this change. The voltage at the external terminals of a capacitor may also change rapidly due to the ESR voltage drop, which does not contradict the voltage continuity of the internal ideal C.
Stored energy E = ½Cv² comes from the integral of v·dq and applies to fixed linear C. A 10 μF capacitor stores 125 μJ at 5 V; when the voltage doubles, the stored energy becomes four times greater. Ideal capacitors in parallel share the same voltage, and their capacitances add up; in series, 1/C_eq = Σ1/C_i. For actual series capacitors, DC voltage division is also affected by leakage, so one cannot rely solely on capacitance ratios to ensure each component stays below its rated voltage.
Same current, different voltage slope?
Scrub time directly. Hold I and t fixed and change C: charge is unchanged while voltage and energy differ. This source actively maintains current; the straight line does not describe charging through a resistor from a voltage source.
Δq=IΔt,dtdv=CI,E=21Cv2
Preparing the visual
Same current, different voltage slope?
Constant current increases charge linearly; voltage slope is I/C while energy is quadratic in voltage.
The sinusoidal steady-state impedance of an ideal capacitor is Z_C = 1/(jωC), where j² = −1 and ω = 2πf. The commonly written 1/(2πfC) is the magnitude of the capacitive reactance; in terms of phase, the current leads the voltage by 90°. Writing impedance solely as a positive real number loses phase information, making it impossible to correctly analyze combinations with inductors and resistors.
An ideal capacitor has zero current in a constant DC steady state, but real devices have leakage. Whether a capacitor can be approximated as a short circuit at a certain non-zero frequency depends on whether its impedance is sufficiently small relative to other branch impedances, not just on the term "high frequency."
The common simplified model for real devices includes series ESR, series ESL, an ideal C, and a parallel resistor representing leakage. Within frequency bands where leakage is ignored and parameters are approximately fixed:
Z ≈ ESR + j(ωESL − 1/(ωC)).
At low frequencies, the capacitive term dominates, and impedance decreases as frequency rises; at f₀ ≈ 1/(2π√(ESL·C)), the inductive and capacitive reactances cancel, and impedance drops to approximately ESR; at higher frequencies, the inductive term dominates, and impedance rises again. This defines the boundary where "higher frequency approaches a short circuit." Murata: Impedance and ESR Frequency Characteristics in Capacitors
For example, C = 100 nF and ESL = 1 nH yield a self-resonant frequency of approximately 15.9 MHz. The ESL in this example includes the inductance within the selected model; actual board traces, pads, and return paths add loop inductance, so the manufacturer's device curve cannot be taken directly as the impedance seen at the chip's power pin.
Connecting multiple capacitors in parallel is not always better at all frequencies: the capacitive and inductive behaviors of different branches can form anti-resonance peaks. Analysis must consider the power distribution network, losses, and layout; placing "one of every value" is not a universally optimal solution.
Why does capacitor impedance rise again?
The blue curve is complex-impedance magnitude; phase and opposing reactances remain visible below. Increasing C or ESL shifts resonance lower, but ESL controls the high-frequency end. An ideal falling curve misses this reversal.
∣Z∣=ESR2+(ωESL−ωC1)2
Preparing the visual
Why does capacitor impedance rise again?
Series inductive and capacitive reactances cancel at resonance; ESR sets the minimum and higher frequencies become inductive.
Good temperature and bias stability, suitable for precision small-capacitance applications
Capacitance, package, frequency, and actual available part numbers
High-K MLCC (X5R/X7R)
High capacitance per unit volume, commonly used for decoupling
DC bias, temperature, aging, mechanical stress
Aluminum Electrolytic
Large capacitance and energy storage
Polarity, leakage, ripple current, temperature, and lifespan
Polymer Capacitors
Some series have lower ESR
Rated voltage, leakage, surge, and failure conditions
Tantalum Capacitors
Specific advantages in volume-to-capacitance ratio
Polarity, surge, and part number requirements; not equivalent to precision
Film Capacitors
Some series suitable for low loss, pulse, or stability needs
Volume, structure, rated waveform, and frequency limits
A type name cannot replace specific curves. X7R indicates a corresponding temperature classification, typically meaning capacitance change does not exceed ±15% within −55°C to +125°C under specified test conditions; it does not guarantee that the capacitance will remain within ±15% of the nominal value after accounting for DC bias, aging, and initial tolerance. Murata: Basic Characteristics of Capacitors
The effective capacitance of high-K MLCCs may decrease significantly under DC bias, with the magnitude depending on the dielectric, size, rated voltage, and specific part number. One cannot assume that "operating voltage below breakdown voltage means no capacitance loss," nor can a fixed discount factor be uniformly applied to all X7R capacitors. Murata: MLCC Voltage, Temperature, and Aging Considerations
For example, if a design requires at least 10 μF at the operating point, and a candidate part retains only 60% of its nominal capacitance under the required bias, with an initial negative tolerance of −20%. These two simplified factors alone require a nominal value of at least 10/(0.6×0.8) ≈ 20.83 μF, not yet accounting for temperature and other effects. This illustrates the assumptions of a budgeting method, not a fixed 60% derating factor for all devices. In practice, prioritize manufacturer models or data covering operating conditions to avoid double-counting derating for the same effect.
Rated voltage cannot be uniformly "selected at 1.5 times." One must compare maximum DC, voltage ripple, start-up/fault transients, and device rated conditions, then determine margins according to type and application rules. AC and safety-rated applications have corresponding ratings and certification requirements; ordinary DC voltage ratings cannot simply replace them.
Low-pass, Coupling, and Decoupling Are Not the Same Connection
RC Low-pass: Output Taken Across the Shunt Capacitor
With an ideal input source passing through a series R to the output, and an output C connected to the reference node, ignoring additional loads, H(jω) = 1/(1+jωRC), and the cutoff frequency f_c = 1/(2πRC). At f_c, the magnitude is 1/√2 of the low-frequency gain, approximately −3 dB; it does not mean all signals are cut off starting from this frequency.
If a load R_L is connected to the output, the DC gain first becomes R_L/(R+R_L), and the pole is determined by (R∥R_L)C. Diagrams and formulas must match; one cannot draw a series capacitor and call it a power smoothing low-pass filter.
Coupling Capacitors Require a DC Path
After a series C, the receiving side returns to its required bias point through a resistor, forming a high-pass filter. The simplest model with an ideal source and grounded load R is H(jω) = jωRC/(1+jωRC). The receiving end does not magically acquire the correct DC bias: without an appropriate path, it may float or have its potential determined by leakage and protection structures.
When the actual source has an output resistance R_s, the resistance seen by the capacitor and the passband gain change. Bias establishment at startup may also form transients; "blocking DC" does not mean there is no current at every moment of connection.
Decoupling Provides a Short Path for Transient Currents
Power supply decoupling capacitors are typically placed across the power and return nodes, helping to maintain local voltage when upstream supply temporarily cannot keep up. The faster the load current changes, the more significant the L·di/dt on the path inductance becomes. Therefore, placing capacitors close to the relevant power/return pins and minimizing the actual current loop has clear electrical significance, not just for neat layout.
Capacitance determines the charge that can be supplied over a certain time, ESR determines the rapid voltage drop caused by current changes, and ESL and mounting inductance affect faster edges. They correspond to different time scales; simply increasing μF does not necessarily reduce the fastest spikes.
Load Step Example: Allocate Voltage Budget First
Assume the power supply has not yet increased current supply in a short time, and the capacitor needs to supply 100 mA for 10 μs, allowing a 50 mV change due to capacitor discharge. According to ΔQ = IΔt and ΔV = ΔQ/C, the minimum effective capacitance is 20 μF.
If the effective capacitance is only 10 μF, the voltage change in this segment is approximately 100 mV. Assuming an ESR of 50 mΩ, a 100 mA step also produces an ESR voltage drop of approximately 5 mV; if 5 mV is reserved for ESR from a total droop budget of 50 mV, the remaining 45 mV corresponds to a required effective capacitance of approximately 22.22 μF. When the real power supply gradually takes over the current, one should integrate "load current minus source supply current," rather than always assuming the source does not respond at all.
Similarly, a 1 nH loop inductance encountering a 100 mA change in 10 ns results in an L·di/dt of approximately 10 mV. These estimates are used to identify limiting factors and do not guarantee that peak values of each item add up at the same moment; actual waveforms require complete network models or appropriate measurement verification.
frommathimportpi,sqrt,isclosecurrent, duration, budget=.1, 10e-6, .05cap_min=current*duration/budgetassertisclose(cap_min,20e-6)esr=.05esr_drop=current*esrcap_with_esr=current*duration/(budget-esr_drop)assertisclose(cap_with_esr,22.22222222222222e-6)f0=1/(2*pi*sqrt(1e-9*100e-9))assert15.9e6<f0<16e6print(f"Minimum effective capacitance {cap_min*1e6:.2f} μF; with ESR reserved {cap_with_esr*1e6:.2f} μF")print(f"Self-resonance of simplified model {f0/1e6:.3f} MHz")
From Capacitance Selection to System Verification
Ripple current generates thermal losses through ESR. For single-frequency and approximately fixed ESR, I_rms²·ESR can be used; for wideband waveforms, losses at different frequencies must be considered. Electrolytic devices especially require combining ripple ratings, temperature, and lifespan models, rather than just checking if capacitance is sufficient.
Low ESR generally helps reduce voltage drop and losses, but it does not mean all voltage regulators welcome arbitrarily low ESR output capacitors. Some control loops require specific capacitance and ESR ranges, while others are designed for low ESR ceramics; one must check against the stability requirements of the specific regulator used. TI: ESR and LDO Stability
Final Check
Question Answered
Capacitance and tolerance at operating point
Is the charge budget truly satisfied?
ESR, impedance, and mounting path
Which frequency bands and time scales may still droop?
Maximum voltage, polarity, and ripple
Is it within the device's operating conditions?
Regulator capacitance/ESR requirements
Is the output network compatible with the control loop?
Layout and load step measurement
Does the actual loop achieve the model's expectations?
Unit conversion: 1 μF = 1000 nF = 10⁶ pF; the common three-digit code 104 is typically encoded in pF, i.e., 10×10⁴ pF = 100 nF. Polarity and special markings should still refer to the device datasheet. The next article, Inductors and Transformers, continues explaining transients, power conversion, and coupling from magnetic field energy storage.