A sensor outputs 20 mV, the amplifier is labeled with a gain of 100, yet only 1.28 V appears across the load; when a larger signal is applied, the output clips. The first issue likely stems from loading, while the second arises from the operating point and swing limits. An amplifier must simultaneously satisfy gain, linear range, frequency response, and load-driving capability; it cannot be described by a single multiplication factor.
Item to Verify
Quantity to Observe
Where to Read
How much the signal is actually amplified
Gain at specified ports, frequency, and load
Calculate gain from source to load
Whether there is room for positive and negative swings
Quiescent operating point and available swing
Bias and dynamic range
Whether to choose common-emitter or follower
Voltage/current transfer and port impedance
Purpose and limits of configurations
Why gain drops at high frequencies
Coupling, parasitics, and shunt capacitance
Bandwidth and Miller effect
Whether negative feedback is effective
Complex loop gain and stability
Feedback does not automatically stabilize
Whether large signals cause distortion
Clipping, nonlinearity, slew rate, and drive
Limits beyond small-signal bandwidth
Amplification is Powered by the Supply; Gain Has Defined Ports
Amplifier circuits use input variations to modulate the energy flow from the power supply to the output. The output is approximately a linear transformation of the input signal within a certain range, but it is not linear for every input, frequency, and load. An emitter follower can have a voltage gain less than 1 while providing current or power gain; a higher voltage does not automatically imply increased power.
For small changes around the operating point, the voltage gain is Av=Δvout/Δvin. The complete instantaneous voltage can be written as vout(t)=VOQ+Av⋅vin,ac(t); one cannot calculate signal gain by dividing the DC bias by the small AC input. In the frequency domain, Av(jω) contains both magnitude and phase.
Voltage gain in decibels is typically written as 20log10∣Av∣; the negative sign indicates phase inversion, not taking the logarithm of a negative number directly. Power gain is 10log10(Pout/Pin). When the input and output reference resistances are not the same, the voltage ratio cannot directly replace the power ratio: for pure resistors using RMS voltage, Pout/Pin=∣Vout/Vin∣2⋅Rin/Rload.
Calculating Gain from Source to Load
Model the source as an open-circuit signal vs in series with Rs, the amplifier input resistance as Rin, the unloaded incremental voltage gain as Av0, and the output resistance Rout driving RL. Under these simplified conditions:
vL/vs=[Rin/(Rs+Rin)]⋅Av0⋅[RL/(Rout+RL)].
Take Rs=10 kΩ, Rin=40 kΩ, Av0=100, Rout=1 kΩ, and RL=4 kΩ. Input loading reduces 20 mV to 16 mV, the internal incremental output becomes 1.6 V, and output loading further reduces it to 1.28 V. The total gain is only 64, approximately 36.1 dB.
Increasing the input resistance or decreasing the source impedance can reduce front-end losses; decreasing the output resistance or increasing the load resistance can reduce back-end losses. However, real impedances vary with frequency, and feedback also alters them. A resistance model at a single frequency cannot guarantee performance across the entire band.
This calculation also illustrates that "high input impedance, low output impedance" is a common goal for voltage transmission. The goals for current input or transimpedance measurement may differ, so this combination should not be treated as a universal standard for all amplifiers.
Bias and Dynamic Range
Transistor amplifiers first require a suitable quiescent operating point, allowing the signal to vary nearby. BJTs typically use the forward active region, while MOSFETs typically use the appropriate saturation region; "swinging in the linear region" without specifying device terminology can easily reverse the understanding of the operating region.
Correct voltage-divider biasing must account for the loading of the base current on the divider, and the emitter resistor changes the operating point through feedback. One cannot treat VB=VCC⋅R2/(R1+R2) as an unconditionally precise value under load. See BJT Bias for the complete circuit and calculations.
Consider a separate 5 V supply educational amplifier, assuming an output range of 0.2–4.8 V is allowed under the specified load, with the quiescent output set to 2.5 V. There is 2.3 V peak margin above and below; if the gain under these conditions is 20, the input peak can be at most about 115 mV to avoid clipping solely due to swing limits.
If the input peak increases to 200 mV, the gain formula requires the output to swing ±4 V around 2.5 V, which already exceeds the assumed capability. Adjusting the bias can only redistribute the upper and lower margins; it cannot expand the total available range out of thin air. Even if the waveform is not clipped, there may still be device nonlinearity, noise, or frequency distortion.
The output range typically varies with load current and temperature. A 5 V supply does not mean the output can precisely reach 0 and 5 V; the input common-mode range is also an independent constraint, and one cannot assume the input operating point is valid just because there is room at the output.
How does bias redistribute headroom?
At 200 mV input, moving bias changes which side clips first but cannot fit the full target waveform. Biasing at 2.5 V balances headroom and maximizes unclipped amplitude for this symmetric signal.
Preparing the visual
How does bias redistribute headroom?
Bias redistributes upper and lower headroom; it does not expand the output range.
"Common" refers to the AC reference terminal shared by the input and output. A terminal being common for AC does not necessarily mean it is directly grounded in DC.
Configuration
Common Voltage Phase & Use
Primary Limits
Common-Emitter / Common-Source
Often inverting, handles voltage amplification
Gain affected by load, degeneration resistor, output resistance, and parasitics
Common-Collector / Common-Drain
Often non-inverting with voltage gain slightly less than 1, used as buffer
Still requires bias, output margin, and sufficient current capability
Common-Base / Common-Gate
Often non-inverting, low input impedance, suitable for some wideband/current input
Not free of parasitic capacitance or infinite bandwidth
−gmRC for common-emitter applies only when the emitter can be considered an AC ground, relevant output resistances are ignored, and the load meets simplified conditions. When an un-bypassed RE is retained in the emitter, feedback reduces gain and increases input resistance; when there is an output load, it should also be included in the collector equivalent load. Drawing RE in the circuit but directly writing the fully bypassed formula will significantly overestimate the gain.
The low input impedance of common-base/common-gate can sometimes reduce the time constant caused by input capacitance; the capacitance across collector-base or drain-gate is no longer connected across high-gain input/output terminals in the same way, but other capacitances, output poles, and device transit effects remain.
Bandwidth and Miller Effect
The low-frequency end may be affected by coupling capacitors, emitter bypass, and bias networks; the high-frequency end may be affected by device parasitics, output loads, and feedback networks. A DC-coupled amplifier does not necessarily have a non-zero low cutoff frequency; bandpass systems often mark the two boundaries where the gain drops by 3 dB relative to the midband gain as fL and fH, with bandwidth fH−fL.
The magnitude of a single first-order pole is 1/1+(f/fp)2. At f=fp, it drops by approximately 3.01 dB, corresponding to a magnitude of 0.707, which does not mean the signal disappears. Multiple poles, zeros, or response peaking will alter the shape; one cannot draw all amplifiers as completely flat and then suddenly dropping like a rectangle.
If a capacitor C is connected between input and output, and vout=Avvin, the current flowing into the capacitor from the input is C⋅d(vin−vout)/dt. In the frequency band where Av can be approximated as a real constant, the input side is equivalent to C(1−Av); for an inverting gain of −49, a 2 pF shunt capacitance can present an input burden of approximately 100 pF.
If this 100 pF is driven by a simplified 10 kΩ source, the single-pole estimate is approximately 159 kHz. Here, the device's physical capacitance has not actually expanded 50 times; rather, the output's reverse change causes a larger voltage change across the shunt capacitor. When Av varies with frequency, the equivalent relationship is no longer a fixed capacitor. MIT: High-Frequency Circuits and Miller Effect
Feedback Is Not Automatically Stable
In the linear feedback model, the error signal is e=x−βy, and the forward gain is y=Ae. Substituting this yields the closed-loop gain Af=A/(1+Aβ). If the low-frequency Aβ is a large positive real number, Af approaches 1/β, but the deviation is still determined by approximately 1/(1+Aβ); one cannot say the gain is "completely determined by external components."
For example, if A=100,000 and β=0.1, the closed-loop gain is approximately 9.999; when A drops to 100 at the corresponding frequency, the closed-loop gain is only about 9.091. Feedback resistor errors, input offset, noise, and source/load conditions can also affect the results. For disturbances and nonlinearities within the appropriate loop, a large loop gain can reduce their output impact, but it cannot eliminate errors outside the loop or clipping that has already hit the power supply limits.
Actual A(jω) and β(jω) have phase. As frequency rises, feedback that was originally intended to cancel out may tend toward regeneration due to delay, causing peaking, ringing, or instability. One should analyze loop gain, crossover, and stability, rather than just confirming that feedback is connected to the "negative" terminal. Analog Devices: Loop Gain and Stability
Input Mixing / Output Sampling
Common Port Impedance Trend
Example Goal
Series / Voltage
Input increases, Output decreases
Voltage amplification
Parallel / Voltage
Input decreases, Output decreases
Transimpedance amplification
Series / Current
Input increases, Output increases
Transconductance amplification
Parallel / Current
Input decreases, Output increases
Current amplification
These trends depend on negative feedback being effective and the feedback network loading being properly handled. In a single-pole dominant voltage feedback model, gain and bandwidth often have an approximate trade-off, but one cannot generalize a constant gain-bandwidth product to arbitrary feedback structures. Analog Devices: Gain and Bandwidth
Limits Beyond Small-Signal Bandwidth
Slew Rate (SR) limits the speed of output voltage change. For a sine wave with peak Vp, the maximum slope is 2πfVp, so the required SR must be at least this value. If the output peak is 2 V and the frequency is 100 kHz, the requirement is approximately 1.257 V/μs; an amplifier with an SR of only 0.5 V/μs cannot output this waveform without distortion, even if its small-signal bandwidth is sufficient. This necessary condition is still not a complete guarantee of low THD. TI: THD+N and Slew Rate
Distortion or Limit
Main Manifestation
What to Check First
Clipping
Flattening of wave peaks or troughs
Bias, supply, loaded swing
Crossover Distortion
Nonlinearity near push-pull zero-crossing
Output stage bias and feedback range
Harmonic Distortion
Sine input produces extra harmonics
Nonlinearity and signal amplitude/frequency
Slew Rate Limiting
Edges of large signals cannot keep up, sine tends toward ramp
SR, amplitude, and frequency
Ringing / Self-oscillation
Oscillation after step or continuous oscillation
Feedback, capacitive load, layout, and power supply
THD is usually calculated as the square root of the sum of squares of the RMS values of each harmonic, divided by the RMS of the fundamental; THD+N also includes components such as noise within the measurement bandwidth. Noise is not deterministic harmonic; a smooth appearance on a single oscilloscope trace does not prove low distortion.
frommathimportlog10,pi,sqrt,isclosegain=40000/(10000+40000)*100*4000/(1000+4000)assertisclose(gain,64)assertisclose(.02*gain,1.28)assertisclose((4.8-2.5)/20,.115)closed=lambdaa,b:a/(1+a*b)assertclosed(100000,.1)>9.99assert9.09<closed(100,.1)<9.1miller=2e-12*(1-(-49))fp=1/(2*pi*10000*miller)sr_required=2*pi*100000*2/1e6assert159000<fp<160000assertsr_required>.5print(f"Total loaded gain {gain:.1f}, {20*log10(gain):.2f} dB; Miller single-pole estimate {fp/1000:.2f} kHz")print(f"Large-signal required slew rate {sr_required:.3f} V/μs")
The analysis sequence can follow a practical signal chain: first confirm DC and load, then verify small-signal gain and frequency response, and finally increase the signal to check swing, slew rate, and stability. The next article Operational Amplifier applies these conditions specifically to op-amp feedback circuits.