Overview of Power Devices

For converters of the same power rating (e.g., several kilowatts), the optimal device may vary depending on the chosen bus voltage, switching frequency, and cooling conditions. Placing MOSFETs, IGBTs, SiC, and GaN on a single "low-end to high-end" ranking chart can obscure the distinctions in device structure, material, and system tasks. This page retains a quick-selection feature while providing the underlying mechanisms and comparison methods for each device class.

This table serves as a candidate entry point, not an automatic conclusion based on voltage or power numbers alone. For fundamental mechanisms, see BJT, MOSFET, and Diodes.

Distinguish Structure, Material, and Package First

MOSFET, IGBT, JFET, HEMT, and thyristor describe device structures or working mechanisms; Si, SiC, and GaN are materials; discrete components, modules, and integrated drive power stages are different implementation forms. A SiC MOSFET belongs to both material and structure classifications and cannot be treated as a mutually exclusive option against "MOSFET."

The higher critical breakdown field and other properties of wide bandgap materials allow drift regions with different thicknesses and doping levels for the same voltage rating, altering the trade-off between on-resistance and capacitance. However, material properties alone cannot determine the maximum operating temperature, drive voltage, or system efficiency for a given package; junction termination, gate structure, packaging, and reliability ratings all contribute to the final result.

Before comparing, clearly define the bus voltage plus overshoot, RMS/peak current, commutation method, frequency, thermal boundary conditions, and fault states for each switch. A nominal "10 kW" rating is insufficient on its own to calculate the stress borne by a single device.

IGBT: Trading Conductivity Modulation for On-State Capability, While Managing Stored Charge

The IGBT uses an insulated gate to control conduction while simultaneously injecting bipolar carriers. These injected carriers increase the conductivity of the drift region, which helps reduce conduction losses under certain voltage ratings, currents, and structures; however, these carriers must be extracted or recombined during turn-off, potentially forming a tail current. Therefore, it cannot be simply explained as "a MOS gate combined with a BJT output, taking the best of both."

A common conduction model approximates $V_{CE}$ as $V_0+rI$ within a limited current and temperature range, calculating power loss by averaging over the corresponding waveform. Data sheet parameters $V_{CE(sat)}$, $E_{on}$, and $E_{off}$ must be read according to current, temperature, gate resistance, bus voltage, and complementary diode conditions. Switching frequency is constrained by losses and system requirements; there is no universal rule that all IGBTs must operate below 50 kHz.

Standard IGBTs should not be assumed to have the same reverse channel or body diode capability as MOSFETs; the reverse current path is often handled by a complementary anti-parallel diode. Reverse-conducting types and other special structures require separate evaluation. Relevant parameters and loss analysis can be found in the manufacturer's IGBT technical documentation portal by series.

A Loss Comparison, Not a Voltage-Based Category Selection

Assume two hypothetical candidates both meet the prerequisite voltage conditions, with a conduction current of 40 A and a duty cycle of 0.5. Candidate A has a thermal equivalent resistance of 80 mΩ; Candidate B approximates $V_{CE}=1.5\text{ V}+15\text{ m}\Omega \times I$ in this temperature range. Thus, Candidate A's full-cycle conduction loss is $0.5\times 40^2\times 0.08=64\text{ W}$, while Candidate B's is $0.5\times 40\times 2.1=42\text{ W}$.

Assume further that under the same commutation conditions, the energy for one turn-on and turn-off cycle is 0.1 mJ for A and 0.5 mJ for B, and remains approximately constant in the frequency band being compared:

The ranking reverses because B's conduction advantage is fixed at 22 W, while its switching loss of 0.4 mJ per cycle accumulates with frequency. The crossover point is $22/0.0004=55\text{ kHz}$. Real-world comparisons require checking energy curves at the operating point to avoid double-counting $E_{on}$ if it already includes diode recovery; drive, dead-time, magnetic components, and cooling losses are also not included in this simplified sum.

Can the lower-loss candidate change with frequency?

At 40 A, crossover is 55 kHz. At lower current it can move to a nonpositive frequency, so B is not always preferable at low frequency. These are specified models, excluding thermal, drive, magnetic and current-dependent switching effects from system efficiency.

$$P=P_{cond}+E_{cycle}f$$

JFET: Regulating the Channel via the Junction Depletion Layer

A common N-channel JFET conducts when $V_{GS}=0$. As the gate junction becomes more reverse-biased, the depletion layer expands, narrowing the effective channel. It controls the channel using a PN junction rather than an insulated gate and typically requires maintaining the gate junction within its applicable reverse-bias range; not all gate voltages result in only leakage current.

JFETs offer favorable input current and noise characteristics in some front-end applications, but total noise is also affected by source impedance, bandwidth, device voltage/current noise, and bias. The absence of an oxide interface does not imply the absence of 1/f noise or that it is inherently quieter than all BJTs/MOSFETs. Power JFETs with different materials and structures may also be used in combination with other devices; JFETs should not be viewed merely as obsolete predecessors to MOSFETs.

SCR, TRIAC, and Gate-Turn-Off Thyristors

SCR Latching Comes from Regenerative Feedback

The PNPN structure of a standard SCR can be understood using mutually coupled PNP and NPN regenerative feedback. After gate triggering, if the main current builds up to a sufficient level, the feedback maintains conduction. Removing the gate signal will not immediately turn off the device as removing the gate voltage does for a MOSFET.

The latching current $I_L$ describes the main current condition required to establish self-holding at the end of triggering; the holding current $I_H$ describes the current condition required to maintain conduction once it is already on. These are not the same parameter. For example, if a hypothetical SCR requires $I_L=30\text{ mA}$ and $I_H=10\text{ mA}$: if the main current only reaches 20 mA during triggering, even though it exceeds $I_H$, you cannot guarantee successful latching after gate removal. ST: Latching Current

Turn-off requires not only reducing the main current below the level needed to maintain conduction but also allowing sufficient time for stored charge recovery and voltage reappliance. Related parameters $t_q$, $dv/dt$, and circuit commutation conditions should be checked simultaneously. Natural AC current zero-crossing aids commutation, but for inductive loads, the current zero-crossing may lag behind the voltage zero-crossing; SCRs are also not physically limited to line frequency. Littelfuse: Gating, Latching, and Holding

TRIACs Conduct Bidirectionally, But Are Not Two Completely Independent SCRs

A TRIAC can control main current in both directions, typically denoted by terminals MT1, MT2, and G. While comparing it to anti-parallel SCRs helps understand external functionality, the actual structure, trigger quadrants, and commutation capabilities differ. If the load is too small to reliably latch, or if an inductive load re-applies voltage too quickly, operation may deviate from expectations. For AC dimming and speed control, confirm whether the load itself is suitable for this control method.

Thyristors such as GTOs and IGCTs have specific gate turn-off capabilities and cannot follow the standard SCR conclusion that "the gate can only turn on, not off." Their turn-off current, drive connections, and low-inductance packaging are part of the system design; applying a negative pulse to a standard SCR does not yield equivalent capability.

Why can current above IH still fail to latch?

Trigger at 20 mA and remove the gate, then retry at 40 mA. After latching, reduce to 20 mA: it remains on. The same current gives different states because successful latching is part of the history. Raising current after falling below IH does not retrigger it.

SiC and GaN: Translating Material Advantages into Operating Points

SiC MOSFET

SiC can improve the drift region trade-offs for certain high-voltage unipolar devices, but $R_{DS(on)}$ still varies with temperature and gate voltage, and switching losses are not zero. Drive voltage, negative turn-off voltage, short-circuit withstand, and avalanche conditions must be checked against specific generations and series; one drive scheme cannot cover all SiC devices.

"High-temperature operation" especially requires distinguishing between normal life rating and short-term overload. For example, Infineon's application note for a CoolSiC G2 limits 200°C operation to an overload condition of 100 hours cumulative full life; this cannot be generalized to mean SiC can continuously operate above 200°C. Infineon: Extended Junction Temperature Conditions

GaN HEMT

Common power GaN HEMTs utilize high-mobility electron channels in heterostructures. Implementations may include enhancement-mode, cascode structures, and integrated drive power stages; gate ratings and external control interfaces are not unified, so "all GaN gates are limited to ±6 V" is not a valid selection rule.

Common lateral GaN HEMTs do not have a body PN diode like silicon power MOSFETs, but they can still exhibit reverse conduction and capacitor charge/discharge. The reverse voltage drop during dead-time, output charge, and dynamic on-resistance affect losses; one cannot deduce "zero reverse current" or "lossless commutation" from "no body diode."

Integrated drivers also mean the external supply voltage differs from the internal gate voltage. For example, TI's LMG3426R030 is a 600 V GaN device with an integrated driver; its external drive power supply range and bare gate rating are not the same concept; input interfaces and protection functions should be consulted using the complete device specifications. TI: Integrated Drive GaN Example

Why Higher Frequency Doesn't Necessarily Mean Smaller or More Efficient Systems

Higher switching frequencies offer the opportunity to reduce the energy storage scale required for magnetic components or filters, but core losses, winding AC losses, drive power consumption, and switching losses will change. Faster edges also increase overshoot and common-mode interference in parasitic loops, potentially requiring better packaging, layout, isolated drives, and filtering.

Therefore, comparisons should fix output metrics and thermal/EMI conditions, then allow each candidate to optimize its drive and passive network. Simply replacing a transistor in an old circuit with a faster material does not guarantee optimal efficiency nor fairly represent that material's system capability.

from math import isclose
current, duty = 40, .5
pa = duty*current**2*.08
pb = duty*current*(1.5+.015*current)
ea, eb = .1e-3, .5e-3
assert (pa, pb) == (64, 42)
cross = (pa-pb)/(eb-ea)
assert isclose(cross, 55000)
assert pa+ea*20000 > pb+eb*20000
assert pa+ea*100000 < pb+eb*100000
print(f"Simplified candidate A/B loss crossover {cross/1000:.1f} kHz; 20/100 kHz ranking reversal verified")

No fixed price multiplier or cross-device frequency upper limit is provided here, as these cannot replace specific models and conditions. The next chapter Fundamentals of Amplifier Circuits returns to the signal chain, discussing the relationships between operating points, gain, feedback, and distortion.